A group of researchers puts the performance of the world’s most potent RISC-V processor, SG2042, under the microscope of how the chip performs compared to other SoCs available on the market and x86 processors. RISC-V is an open-source Instruction Set Architecture (ISA). Unlike architectures such as x86 and ARM, RISC-V is free from licensing constraints and can be used, modified, and distributed without having to pay royalties or face intellectual property restrictions.
Many companies are focusing heavily on RISC-V thanks to the possibility of developing customized or specific products without having to pay for licenses, the flexibility and adaptability of the platform, which make it particularly suitable for particular sectors such as the Internet of Things (IoT), ‘ edge computing and artificial intelligence. Reduced costs, independence from specific suppliers, the presence of an active and ever-growing community, and the possibility of counting on an approach based on collaborative innovation have convinced many industrial companies to make investments in RISC-V.
Nothing prevents, however, from developing intellectual property by exploiting the basis provided by RISC-V: an example of this is the RISC-V vector unit from the European Semi Dynamics, expressly intended for machine learning and artificial intelligence applications. Qualcomm itself, which recently confirmed its commitment to the ARM platform with the launch of the Snapdragon X SoCs designed for the PC world, explained in detail why it is investing in RISC-V.
Not to mention the legendary chip designer Jim Keller, who, on the one hand, observes how the competition between ISA ARM64 and x86-64 is corny and out of place, and on the other, explains that RISC-V will shake up the market because it is a young platform, without heavy burdens accumulated over the years to manage due to compatibility issues.
As a component of a review completed by a gathering of scholastics from the College of Edinburgh (Scotland), helped by partners from the PerfXLab lab, the specialists needed to test the way of behaving of what is presently viewed as the RISC-V processor delivered in the most powerful series on the planet. This is the Chinese Sophon SG2042, the initial 64-center RISC-V processor for elite execution jobs. For their experiments, the supercomputer experts used the Milk-V Pioneer system, in which the SG2042 processor is mounted on a Micro-ATX motherboard (costs around 1,150 euros, including the CPU).
Using numerous benchmarks, researchers measured the single-threaded and multi-threaded performance of the SG2042 processor. Specifically, they completed a few handling tests with single and twofold accuracy drifting point estimations (FP32/FP64). Many algorithms used by the research team in the field of HPC (High-Performance Computing) form the basis of the Linpack benchmark, used, for example, to determine the ranking in the Top 500 of the fastest supercomputers in the world.
Well, it turned out that each of the 64 C920 cores that make up SG2042 works on 128-bit vector units, share 1 MB of L2 cache every four seats, and all 64 use 64 MB of L3 cache (in another article, we see what the cache of a processor ). The memory regulator handles four channels for DDR4-3200 Slam. As expected, each core of the SG2024 ensures much higher computational power than, for example, a StarFive JH7110. However, each C920 core offers four to twelve times the computing power of a StarFive U74 core, with a 33% faster clock speed.
The growth at home RISC-V is impressive. However, if the point of comparison is the performance of x86 processors, RISC-V still has to improve. Really, a lot, according to the researchers. From the tests carried out, it emerged that even the seven-year-old Intel. Scholars have identified some weaknesses, such as the number of memory controllers per NUMA node. NUMA ( Non-Uniform Memory Access ) is a system architecture in which multiple processors share memory, but accessing certain portions of memory takes different times.
Memory controllers manage memory access across other NUMA nodes. The future adoption of the RISC-V RVV v1.0 vector specification should help improve the performance of NUMA nodes and optimize the performance of compilers such as GCC ( GNU Compiler Collection ) and Clang.
Several companies active in the development of RISC-V processors have already announced significantly more powerful RV64GC cores. However, it will take several years before mass production of SoCs equipped with these new, more updated, and much more powerful cores finally begins. For example, SiFive had already announced the U74 above of the StarFive JH7110 processor in 2018, which will only be available from the beginning of 2023.
The U74 has, however, already disappeared from the company’s official website. One of the best-performing RISC-V cores announced in recent times is the SiFive P670: its presentation dates back approximately a year ago. Even more updated and powerful is the SiFive Performance P870. Ventana Microsystems, in turn, is working on a RISC-V chipset processor that uses a 5nm manufacturing node and up to 192 cores in the same package, with a clock frequency of up to 3.6 GHz.
Finally, RISC-V computing accelerators for AI-related inference tasks are now available as PCIe 4.0 cards under the brand name of Esperanto Technologies, a company owned by former Transmeta founder Dave Ditzel. Esperanto ET-SOC-1 has over 1,000 RISC-V cores, and up to 16 cards totaling over 16,000 RISC-V cores can be installed in a rack server with two Intel Xeon processors. Despite the still unconvincing performance, the future of RISC-V promises to be very bright.
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